[drm] Display Core initialized with v3.2.223! [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x07000A01 [drm] kiq ring mec 3 pipe 1 q 0 [drm] VCN decode and encode initialized successfully(under DPG Mode). [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 test pass [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.52.0 20150101 for 0000:11:00.0 on minor 0 [drm] DSC precompute is not needed. [drm] Display Core initialized with v3.2.223! [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x07000A01 [drm] kiq ring mec 3 pipe 1 q 0 [drm] VCN decode and encode initialized successfully(under DPG Mode). [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 test pass [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.52.0 20150101 for 0000:11:00.0 on minor 0 [drm] DSC precompute is not needed. [drm] Display Core initialized with v3.2.223! [drm] DP-HDMI FRL PCON supported [drm] DMUB hardware initialized: version=0x07000A01 [drm] kiq ring mec 3 pipe 1 q 0 [drm] VCN decode and encode initialized successfully(under DPG Mode). [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 test pass [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.52.0 20150101 for 0000:11:00.0 on minor 0 [drm] DSC precompute is not needed. [drm] kiq ring mec 3 pipe 1 q 0 [drm] VCN decode and encode initialized successfully(under DPG Mode). [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 test pass [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.52.0 20150101 for 0000:11:00.0 on minor 0 [drm] DSC precompute is not needed. [drm] kiq ring mec 3 pipe 1 q 0 [drm] VCN decode and encode initialized successfully(under DPG Mode). [drm] ring gfx_32768.1.1 was added [drm] ring compute_32768.2.2 was added [drm] ring sdma_32768.3.3 was added [drm] ring gfx_32768.1.1 test pass [drm] ring gfx_32768.1.1 ib test pass [drm] ring compute_32768.2.2 test pass [drm] ring compute_32768.2.2 ib test pass [drm] ring sdma_32768.3.3 test pass [drm] ring sdma_32768.3.3 ib test pass [drm] Initialized amdgpu 3.52.0 20150101 for 0000:11:00.0 on minor 0 [drm] DSC precompute is not needed.